• Autonomous Landmine Detector
    A system which involves a user interface , server and a robot to detect Landmines in a given area autonomously. The Landmine detecting robots are designed to cover maximum possible area of landmine field for detection of landmines. The detected landmines along with scanned and leftover area are represented on a visual map. The whole set of tasks are designed to be done with minimum human interactions making it safer and at the same time more efficient.

  • Vehicle Number Plate Analyzer
    The vehicle number plate is the unique identifier for every vehicle in Sri Lanka. Number plate identification is very important for various purposes such as traffic statistics, identification of traffic law violations, identification of criminals’ vehicles, identification of fake number plates, etc. Automating such a system is a really challenging task due to different reasons. In the image acquisition step, a lot of undesired noise, lighting issues, and blurring effects are introduced to the image due to these images being acquired from CCTV cameras under non-ideal conditions.

  • Compiler for Cool Language
    Compiler for COOL language written in C++. Topics of lexical analysis, parsing theory, symbol tables, type systems, scope, semantic analysis, intermediate representation, runtime environments, code generation and basic programming analysis and optimization explored while constructing the compiler.

  • Analysis Tool for Industrial Images
    An analysis tool for increasing the performance of an injection mold maintenance device which uses image processing techniques to identify stuck plastic particles on molds.

  • Multi-Processor System-on-Chip (MPSoC)
    Used FPGA design tools to create MPSoc with shared memory to share data between the processors.Extended communication to dedicated hardware FIFO queue for better performance

  • CRC using custom NiosII processor
    Using FPGA design tools to create a System-on-Chip with customized NiosII Processor. The customization is done in order to improve the performance of modulo-2 division operation in Cyclic-Redundancy-Check(CRC) algorithm commonly used in network devices.

  • 8 bit Processor
    Designed 8-bit ALU with a register file for memory using Verilog. Simulated processor behaviour using Icarus Verilog and input and output signals were observed using GTKWave. Tested behaviour using ARM assembly code.

  • Fractal Generator
    A tool to display Mandelbrot and Julia sets, for given parameters.Use of multi-threading concepts in generating the images.

  • Image Processing techniques to detect damaged fruit
    Image Filtering with OpenCV was used to create an algorithm to detect the deformities of fruit. Created application using python to continuously monitor given set of images

  • Hospital Management System
    Created a website to show the availability of doctors and appointment reservation for the patients.